1. Field of the Invention
Embodiments of the present disclosure generally relate to methods of fabricating a semiconductor device and photo mask sets used therein and, more particularly, to methods of fabricating fine patterns and photo mask sets used therein.
2. Description of the Related Art
Each of the semiconductor devices, for example, semiconductor memory devices include a cell region having a plurality of memory cells and a peripheral circuit region surrounding the cell region. As the semiconductor memory devices become more highly integrated, sizes of circuit patterns constituting the semiconductor devices have been reduced. If the sizes of the circuit patterns are reduced, a difference in the pattern density and size between the cell region including fine patterns and the peripheral circuit region surrounding the cell region may abruptly increase. In such a case, the fine patterns located at edges of the cell region may be abnormally formed to have deformed configurations due to a proximity effect during a lithography process and an etching process for forming the fine patterns. That is, it may be difficult to control the critical dimensions (CDs) of the fine patterns located at the edges of the cell region. Therefore, process margins of the lithography process and the etching process may be reduced. Accordingly, dummy patterns may be disposed in a border region between the cell region and the peripheral circuit region in order to improve the CD controllability and the process margin to the fine patterns located at the edges of the cell region.
The number of the dummy patterns may increase to improve the CD uniformity of the fine patterns in the cell region. However, increase of the number of the dummy patterns may cause degradation of the integration density of the semiconductor devices. As a result, there may be some limitations in improving the CD uniformity of the fine patterns in the cell region.